US 12,218,236 B2
Devices including heterogeneous channels, and related memory devices, electronic systems, and methods
Scott E. Sills, Boise, ID (US); Ramanathan Gandhi, Singapore (SG); Durai Vishak Nirmal Ramaswamy, Boise, ID (US); Yi Fang Lee, Boise, ID (US); and Kamal M. Karda, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 27, 2022, as Appl. No. 18/050,424.
Application 18/050,424 is a division of application No. 16/596,448, filed on Oct. 8, 2019, granted, now 11,515,417.
Claims priority of provisional application 62/743,075, filed on Oct. 9, 2018.
Prior Publication US 2023/0081634 A1, Mar. 16, 2023
Int. Cl. H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H10B 63/00 (2023.01)
CPC H01L 29/7827 (2013.01) [H01L 29/1054 (2013.01); H01L 29/66969 (2013.01); H10B 63/34 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A device, comprising:
a conductive line;
a conductive contact on the conductive line;
pillar structures on the conductive contact, each pillar structure comprising:
an oxide semiconductor channel comprising a region and at least one additional region, the region oxygen-rich relative to the at least one additional region; and
another conductive contact on the oxide semiconductor channel;
gate electrodes laterally neighboring the pillar structures; and
dielectric material intervening between the gate electrodes and the pillar structures.