| CPC H01L 29/7781 (2013.01) [H01L 21/31116 (2013.01); H01L 29/2003 (2013.01); H01L 29/66462 (2013.01)] | 5 Claims |

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1. A semiconductor structure, comprising:
a substrate;
a stacked structure on the substrate, and comprising:
a buffer layer;
a channel layer on the buffer layer;
a barrier layer on the channel layer;
a semiconductor gate layer on the barrier layer; and
a metal gate layer on the semiconductor gate layer and completely overlapping a top surface of the semiconductor gate layer;
an insulating layer on the stacked structure;
a passivation layer on the insulating layer; and
a contact structure through the passivation layer and the insulating layer and directly contacting a first portion of a top surface of the metal gate layer of the stacked structure, wherein the insulating layer directly contacting a second portion of the top surface of the metal gate layer and comprises an extending portion protruding from a sidewall of the passivation layer and hanging above the first portion of the top surface of the metal gate layer, wherein the first portion of the top surface of the metal gate layer is lower than the second portion of the top surface of the metal gate layer, a top surface and a bottom surface of the extending portion of the insulating layer are directly covered by a liner of the contact structure.
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