US 12,218,223 B2
Method of manufacturing semiconductor device
Choongsun Kim, Suwon-si (KR); Shigenobu Maeda, Seongnam-si (KR); and Myoungkyu Park, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jul. 29, 2022, as Appl. No. 17/877,251.
Claims priority of application No. 10-2021-0142573 (KR), filed on Oct. 25, 2021.
Prior Publication US 2023/0127871 A1, Apr. 27, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/66795 (2013.01) [H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming an active fin to protrude from a substrate and extend in a first direction;
forming a sacrificial gate pattern to intersect the active fin and extend in a second direction, the second direction perpendicular to the first direction;
forming a recess region on the active fin on at least one side of the sacrificial gate pattern;
forming a source/drain region on the recess region of the active fin;
removing the sacrificial gate pattern to form an opening; and
depositing a gate dielectric layer and a gate electrode to form a gate structure that covers the active fin in the opening,
wherein the forming the source/drain region comprises
forming an initial source/drain region having a first carrier concentration on the recess region of the active fin by performing an epitaxial growth process and an in-situ doping process of doping first conductivity-type impurity elements, and
forming the source/drain region having a second carrier concentration less than the first carrier concentration by changing a carrier concentration of the initial source/drain region.