CPC H01L 29/42392 (2013.01) [H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/41775 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A method for forming a semiconductor device structure, comprising:
forming a dielectric layer over a substrate, wherein the dielectric layer has a trench;
forming a gate stack in the trench, wherein a first top surface of the gate stack is lower than a second top surface of the dielectric layer;
forming a cap layer over the gate stack and in the trench;
forming a protective layer over the cap layer, wherein a lower portion of the protective layer is embedded in the cap layer;
forming a first through hole in the protective layer;
forming a second through hole in the cap layer and under the first through hole; and
forming a contact structure in the first through hole and the second through hole.
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