| CPC H01L 29/42368 (2013.01) [H01L 29/41725 (2013.01); H01L 29/513 (2013.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a substrate;
a first dielectric layer on the substrate;
a second dielectric layer on the first dielectric layer, the second dielectric layer including hafnium;
a gate electrode on the second dielectric layer;
a gate capping pattern on the gate electrode;
a first spacer on a side surface of the gate electrode, the first spacer having a first dielectric constant;
a second spacer on the first spacer, the second spacer having a second dielectric constant;
a third spacer between the first spacer and the second spacer, the third spacer having a third dielectric constant;
an interlayer insulating layer covering the second spacer; and
a contact plug in the interlayer insulating layer and electrically connected to the substrate,
wherein the first dielectric constant ranges from 6.5 to 7.5,
wherein the second dielectric constant ranges from 3 to 6,
wherein the third dielectric constant is less than the first dielectric constant and the second dielectric constant.
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