| CPC H01L 29/404 (2013.01) [H01L 21/56 (2013.01); H01L 23/3171 (2013.01); H01L 23/3192 (2013.01); H01L 29/2003 (2013.01); H01L 29/401 (2013.01); H01L 29/41775 (2013.01); H01L 29/66462 (2013.01); H01L 29/7787 (2013.01)] | 5 Claims |

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1. A method for manufacturing a semiconductor device, comprising:
forming a first nitride-based semiconductor layer over a substrate;
forming a second nitride-based semiconductor layer on the first nitride-based semiconductor layer;
forming a gate electrode over the second nitride-based semiconductor layer;
forming a first passivation layer on the second nitride-based semiconductor layer to cover the gate electrode;
forming a first blanket field plate on the first passivation layer;
patterning the first blanket field plate to form a first field plate above the gate electrode using a wet etching process;
forming a second passivation layer on the first passivation layer to cover the first field plate;
forming a second blanket field plate on the second passivation layer; and
patterning the second blanket field plate to form a second field plate above the first field plate using a dry etching process.
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