| CPC H01L 29/0653 (2013.01) [H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/66818 (2013.01)] | 19 Claims |
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1. An integrated circuit (IC) device, comprising:
fin patterns on a substrate along a first direction;
gate electrodes along a second direction perpendicular to the first direction;
source/drain regions on the fin patterns; and
an isolation region extending in the first direction between and in parallel with two adjacent fin patterns of the fin patterns, the isolation region separating at least one gate electrode of the gate electrodes into first and second gate electrodes,
wherein the isolation region includes a first portion between the first and second gate electrodes, and a second portion separated from the first portion along the first direction and having a non-overlapping relationship with the first and second gate electrodes, a thickness of the lowermost part of the first portion relative to a bottom of the substrate being larger than a thickness of the lowermost part of the second portion relative to a bottom of the substrate, and a lower part of the second portion having a decreasing width at a bottom thereof.
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