US 12,218,186 B2
Back-end-of-line passive device structure having common connection to ground
Wen-Chiung Tu, Hsinchu (TW); Hsiang-Ku Shen, Hsinchu (TW); Yuan-Yang Hsiao, Hsinchu (TW); Tsung-Chieh Hsiao, Changhua County (TW); Chen-Chiu Huang, Hsinchu (TW); and Dian-Hau Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 7, 2022, as Appl. No. 17/666,285.
Claims priority of provisional application 63/289,457, filed on Dec. 14, 2021.
Prior Publication US 2023/0187479 A1, Jun. 15, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 27/06 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/91 (2013.01) [H01L 23/5223 (2013.01); H01L 23/5226 (2013.01); H01L 27/0688 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device structure, comprising:
a metal-insulator-metal (MIM) stack comprising a plurality of conductor plate layers interleaved by a plurality of insulator layers, the MIM stack including a first region and a second region, the first region and the second region overlapping in a third region;
a first via passing through the first region and electrically coupled to a first subset of the plurality of conductor plate layers;
a second via passing through the second region and electrically coupled to a second subset of the plurality of conductor plate layers; and
a ground via passing through the third region and electrically coupled to a third subset of the plurality of conductor plate layers,
wherein at least one of the third subset of the plurality of conductor plate layers vertically overlaps with at least one of the first subset of the plurality of the conductor plate layers and at least one of the second subset of the plurality of the conductor plate layers,
wherein the first subset of the plurality of conductor plate layers is insulated from the second subset of the plurality of conductor plate layers by at least one of the plurality of insulator layers.