US 12,218,143 B2
Array substrate and manufacturing method thereof
Macai Lu, Guangdong (CN); and Jiangbo Yao, Guangdong (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Guangdong (CN)
Appl. No. 17/426,907
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Guangdong (CN)
PCT Filed May 26, 2021, PCT No. PCT/CN2021/095939
§ 371(c)(1), (2) Date Jul. 29, 2021,
PCT Pub. No. WO2022/205593, PCT Pub. Date Oct. 6, 2022.
Claims priority of application No. 202110334360.5 (CN), filed on Mar. 29, 2021.
Prior Publication US 2023/0369339 A1, Nov. 16, 2023
Int. Cl. H01L 27/12 (2006.01)
CPC H01L 27/1222 (2013.01) [H01L 27/1251 (2013.01); H01L 27/1255 (2013.01); H01L 27/127 (2013.01)] 11 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate, an active layer disposed on the substrate, a first insulating layer disposed on the substrate and the active layer, a first metal layer disposed on the first insulating layer, a second insulating layer disposed on the substrate, the active layer, the first insulating layer, and the first metal layer and covering the first insulating layer and the first metal layer, and a second metal layer disposed on the second insulating layer;
wherein the array substrate has a thin film transistor (TFT) area, the first metal layer comprises a gate sub-layer located in the TFT area, the second metal layer comprises a source-drain metal sub-layer located in the TFT area, the TFT area comprises an active layer exposed area located between the gate sub-layer and the source-drain metal sub-layer, the array substrate further comprises a barrier layer located above the active layer, and an orthographic projection of the barrier layer on the active layer at least partially covers an orthographic projection of the active layer exposed area on the active layer;
the barrier layer is disposed on the second insulating layer, and the barrier layer and the second metal layer are formed in a same process;
the TFT area comprises a driving TFT sub-area, the gate sub-layer comprises a first gate located in the driving TFT sub-area, the source-drain metal sub-layer comprises a first source and a first drain located in the driving TFT sub-area, the active layer exposed area comprises a first exposed sub-area located between the first source and the first gate and a second exposed sub-area located between the first drain and the first gate, the barrier layer comprises a first barrier sub-layer, and the active layer comprises a first active sub-layer located in the driving TFT sub-area;
an orthographic projection of the first barrier sub-layer on the first active sub-layer at least partially covers an orthographic projection of the first exposed sub-area on the first active sub-layer; and/or the orthographic projection of the first barrier sub-layer on the first active sub-layer at least partially covers an orthographic projection of the second exposed sub-area on the first active sub-layer; and
the first barrier sub-layer comprises a barrier body disposed above the first gate, a first branch extending from an end of the barrier body to the first exposed sub-area, and a second branch extending from another end of the barrier body to the second exposed sub-area, and an orthographic projection of the barrier body on the first active sub-layer completely covers an orthographic projection of the first gate on the first active sub-layer.