US 12,218,137 B2
Structure and method for gate-all-around metal-oxide-semiconductor devices with improved channel configurations
Jhon Jhy Liaw, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 10, 2023, as Appl. No. 18/447,407.
Application 17/858,989 is a division of application No. 16/657,606, filed on Oct. 18, 2019, granted, now 11,393,817, issued on Jul. 19, 2022.
Application 18/447,407 is a continuation of application No. 17/858,989, filed on Jul. 6, 2022, granted, now 11,830,878.
Prior Publication US 2023/0395601 A1, Dec. 7, 2023
Int. Cl. H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/0924 (2013.01) [H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device structure, comprising:
a base fin arising from a substrate;
a first source/drain feature and a second source/drain feature disposed over the base fin;
a plurality of nanostructures extending between and in contact with the first source/drain feature and the second source/drain feature along a direction;
a metal gate structure wrapping around each of the plurality of nanostructures; and
a first dielectric gate structure and a second dielectric gate structure disposed over the base fin,
wherein the first source/drain feature, the metal gate structure and the second source/drain feature are disposed between the first dielectric gate structure and the second dielectric gate structure along the direction,
wherein, along the direction, the first dielectric gate structure is spaced apart from the first source/drain feature by a stack of semiconductor layers interleaved by a stack of inner spacer features.