| CPC H01L 27/0248 (2013.01) [H01L 24/05 (2013.01); H01L 29/401 (2013.01); H01L 29/417 (2013.01); H01L 29/66181 (2013.01); H01L 29/945 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/05018 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05557 (2013.01); H01L 2224/05564 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/06181 (2013.01)] | 20 Claims |

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1. A chip part, comprising:
a substrate, having a first main surface and a second main surface opposite to the first main surface;
a first external electrode and a second external electrode, disposed on the first main surface of the substrate and separated from each other;
a capacitor portion, disposed on the first main surface of the substrate when viewed from a plan view and along a normal direction of the first main surface, wherein
the capacitor portion includes a plurality of wall portions having a lengthwise direction and separated from each other by a trench formed on the first main surface, and
the capacitor portion is disposed at least between the first external electrode and the second external electrode;
a lower electrode, including:
a first body portion, disposed along top and side surfaces of the plurality of wall portions; and
a first peripheral portion, integrally drawn out around the capacitor portion from the first body portion;
a capacitive film, including:
a second body portion, disposed on the lower electrode, along the top and side surfaces of the plurality of wall portions and within the capacitor portion; and
a second peripheral portion, integrally drawn out from the second body portion to the first peripheral portion;
an upper electrode, disposed on the capacitive film;
a first electrode film, electrically connecting the first external electrode to the lower electrode; and
a second electrode film, electrically connecting the second external electrode to the upper electrode, wherein
the first peripheral portion and the second peripheral portion are drawn out of an edge of the upper electrode in the plan view, and have a common edge located further out of the edge of the upper electrode,
the plurality of wall portions are formed of a plurality of pillar units,
each of the plurality of pillar units includes a central portion and three protruding portions extending from the central portion to three different directions in the plan view, and
the plurality of wall portions are formed by connecting the three protruding portions of adjacent pillar units.
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