US 12,218,114 B2
Semiconductor device and method of making a photonic semiconductor package
KyungOe Kim, Incheon (KR); YoungCheol Kim, Gyeonggi-do (KR); and HeeSoo Lee, Incheon (KR)
Assigned to STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed by STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed on Oct. 27, 2021, as Appl. No. 17/452,489.
Prior Publication US 2023/0125546 A1, Apr. 27, 2023
Int. Cl. H01L 25/16 (2023.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 31/12 (2006.01)
CPC H01L 25/167 (2013.01) [H01L 21/56 (2013.01); H01L 23/3157 (2013.01); H01L 23/49816 (2013.01); H01L 23/49833 (2013.01); H01L 23/5385 (2013.01); H01L 31/12 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method of making a semiconductor device, comprising:
providing an interposer;
disposing a first semiconductor die over the interposer with a portion of the first semiconductor die extending over a fourth edge of the interposer and outside a footprint of the interposer;
disposing a first PCB unit over the interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view;
disposing a second PCB unit over the interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
disposing a third PCB unit over the interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit;
disposing the interposer and first semiconductor die over a substrate with the first semiconductor die, first PCB unit, second PCB unit, and third PCB unit between the interposer and substrate;
disposing a first solder bump between the interposer and first PCB unit; and
disposing a second solder bump between the first PCB unit and substrate.
 
5. A semiconductor device, comprising:
an interposer;
a first discrete passive component disposed on a first surface of the interposer;
a first portion of solder extending from the first discrete passive component to a first contact pad of the interposer;
a second discrete passive component disposed on a second surface of the interposer;
a second portion of solder extending from the second discrete passive component to a second contact pad of the interposer;
a first semiconductor die disposed over the first surface of the interposer with a photonic portion of the first semiconductor die extending outside a footprint of the interposer;
a second semiconductor die disposed over the second surface of the interposer;
a substrate disposed with the first semiconductor die between the interposer and substrate;
a first PCB unit disposed between the substrate and interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view, wherein the first discrete passive component is physically directly between the first PCB unit and the first semiconductor die;
a second PCB unit disposed between the substrate and interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
a third PCB unit disposed between the substrate and interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit; and
an encapsulant deposited between the interposer and substrate, wherein the encapsulant covers a first portion of a first surface of the first semiconductor die while a second portion of the first surface including the photonic portion remains exposed from the encapsulant.
 
9. A semiconductor device, comprising:
an interposer;
a first semiconductor die disposed over the interposer with a portion of the first semiconductor die extending over a fourth edge of the interposer and outside a footprint of the interposer;
a first PCB unit disposed over the interposer adjacent to a first edge of the first semiconductor die and between the first edge of the first semiconductor die and a first edge of the interposer in plan view;
a second PCB unit disposed over the interposer adjacent to a second edge of the first semiconductor die and between the second edge of the first semiconductor die and a second edge of the interposer in plan view, wherein the second edge of the first semiconductor die is perpendicular to the first edge of the first semiconductor die;
a third PCB unit disposed over the interposer adjacent to a third edge of the first semiconductor die and between the third edge of the first semiconductor die and a third edge of the interposer in plan view, wherein the first semiconductor die is directly between the first PCB unit and third PCB unit;
a substrate disposed with the first semiconductor die, first PCB unit, second PCB unit, and third PCB unit between the interposer and substrate;
a first solder bump disposed between the interposer and first PCB unit; and
a second solder bump disposed between the first PCB unit and substrate.