US 12,218,094 B2
Electronic package structure and method for manufacturing the same
Wei-Jen Wang, Kaohsiung (TW); Yi Dao Wang, Kaohsiung (TW); and Tung Yao Lin, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Mar. 19, 2024, as Appl. No. 18/610,185.
Application 18/610,185 is a continuation of application No. 17/535,407, filed on Nov. 24, 2021, granted, now 11,935,855.
Prior Publication US 2024/0222306 A1, Jul. 4, 2024
Int. Cl. H01L 23/00 (2006.01); H01L 23/498 (2006.01)
CPC H01L 24/16 (2013.01) [H01L 23/49822 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 2224/10122 (2013.01); H01L 2224/10145 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/81224 (2013.01)] 20 Claims
OG exemplary drawing
 
17. A method for manufacturing an electronic package structure, comprising:
providing a first electronic component comprising a first conductive layer and a second electronic component comprising a second conductive layer contacting the first conductive layer;
performing a thermal compression bonding process on the first electronic component and the second electronic component; and
applying a condensed energy on the first electronic component.