| CPC H01L 24/11 (2013.01) [H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 23/49822 (2013.01); H01L 24/13 (2013.01); H01L 24/96 (2013.01); H01L 2224/11003 (2013.01); H01L 2224/11005 (2013.01); H01L 2224/13023 (2013.01)] | 18 Claims |

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1. A semiconductor packaging method, comprising:
providing at least one semiconductor device and a first carrier board, wherein each of the at least one semiconductor device respectively has an active surface and an opposing passive surface, the active surface is formed with connecting terminals, the passive surface is formed with a plurality of first alignment solder parts, and the first carrier board is formed with a plurality of second alignment solder parts respectively corresponding to the plurality of first alignment solder parts;
placing the at least one semiconductor device on the first carrier board such that the plurality of first alignment solder parts are substantially aligned with respective ones of the plurality of second alignment solder parts;
forming a plurality of alignment solder joints by soldering the plurality of first alignment solder parts to respective ones of the plurality of second alignment solder parts to align and fix the at least one semiconductor device to the first carrier board;
removing the first carrier board after attaching a second carrier board to the active surface of the at least one semiconductor device;
forming a molded package body on a side of the second carrier board where the at least one semiconductor device is disposed, the molded package body encapsulating the at least one semiconductor device; and
removing the second carrier board to expose the connecting terminals.
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