US 12,218,086 B2
Semiconductor package and method of manufacturing same
Yongbum Kwon, Yongin-si (KR); and Unbyoung Kang, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 8, 2022, as Appl. No. 17/716,054.
Claims priority of application No. 10-2021-0113348 (KR), filed on Aug. 26, 2021.
Prior Publication US 2023/0061418 A1, Mar. 2, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/768 (2006.01)
CPC H01L 24/03 (2013.01) [H01L 21/76802 (2013.01); H01L 21/76898 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/03011 (2013.01); H01L 2224/033 (2013.01); H01L 2224/0355 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package, the method comprising:
preparing a semiconductor structure including a semiconductor layer and a through-via penetrating through the semiconductor layer;
forming an insulating layer on the semiconductor structure;
forming an opening in the insulating layer to expose an upper surface of the through-via;
forming a barrier layer on the insulating layer to cover the upper surface of the through-via, inner side surfaces of the opening, and an upper surface of the insulating layer;
forming a metallic material layer on the barrier layer, wherein the metallic material layer includes a concave portion and a non-concaved portion;
forming a blocking layer on the metallic material layer, wherein the blocking layer includes a first portion covering the concaved portion of the metallic material layer and a second portion covering the non-concaved portion of the metallic material layer;
performing a first planarization process to remove the second portion of the blocking layer, while the first portion of the blocking layer remains;
performing a second planarization process to remove the non-concaved portion of the metallic material layer and expose the barrier layer on the insulating layer; and
performing a wet etching process to remove the barrier layer on the insulating layer and the first portion of the blocking layer, wherein a recessed portion below an upper surface of the metallic material layer is formed in the barrier layer during the wet etching process.