US 12,218,081 B2
Microelectronic devices with a polysilicon structure above a staircase structure, and related methods
Jivaan Kishore Jhothiraman, Meridian, ID (US); John M. Meldrim, Boise, ID (US); and Lifang Xu, Boise, ID (US)
Assigned to Lodestar Licensing Group LLC, Evanston, IL (US)
Filed by Lodestar Licensing Group, LLC, Evanston, IL (US)
Filed on Jul. 21, 2023, as Appl. No. 18/356,997.
Application 18/356,997 is a continuation of application No. 17/443,616, filed on Jul. 27, 2021, granted, now 11,710,710.
Application 18/356,997 is a continuation of application No. 16/674,644, filed on Nov. 5, 2019, granted, now 11,088,088, issued on Aug. 10, 2021.
Prior Publication US 2023/0361053 A1, Nov. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/535 (2006.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01)
CPC H01L 23/562 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76831 (2013.01); H01L 21/76877 (2013.01); H01L 21/76895 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/535 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H01L 2221/1063 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A microelectronic device, comprising:
a stack structure comprising vertically repeated tiers individually comprising at least one conductive material and at least one insulative material, the stack structure defining at least one staircase structure with steps along horizontal edges of the tiers;
a polysilicon fill material substantially filling a volume above the at least one staircase structure, the polysilicon fill material substantially forming to the steps of the at least one staircase structure; and
a dielectric material between the polysilicon fill material and the at least one staircase structure.