US 12,218,063 B2
EMIB architecture with dedicated metal layers for improving power delivery
Jianyong Xie, Chandler, AZ (US); Sujit Sharan, Chandler, AZ (US); and Huang-Ta Chen, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 5, 2020, as Appl. No. 16/810,192.
Prior Publication US 2021/0280518 A1, Sep. 9, 2021
Int. Cl. H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/64 (2006.01); H01L 25/18 (2023.01)
CPC H01L 23/5381 (2013.01) [H01L 23/49827 (2013.01); H01L 23/5386 (2013.01); H01L 23/642 (2013.01); H01L 24/16 (2013.01); H01L 25/18 (2013.01); H01L 2224/16227 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A bridge, comprising:
a silicon substrate;
a routing stack over the silicon substrate, wherein the routing stack comprises:
a first routing layer, wherein the first routing layer has a first thickness;
a second routing layer, wherein the second routing layer has a second thickness that is greater than the first thickness; and
a third routing layer having the first thickness, wherein the second routing layer is vertically between the first routing layer and the third routing layer.