US 12,218,038 B2
Leadframe, semiconductor package and method
Chau Fatt Chiang, Melaka (MY); Paul Armand Asentista Calo, Melaka (MY); Kok Yau Chua, Melaka (MY); Josef Hoeglauer, Heimstetten (DE); Swee Kah Lee, Melaka (MY); and Khay Chwan Saw, Melaka (MY)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Aug. 6, 2019, as Appl. No. 16/533,315.
Claims priority of application No. 18187774 (EP), filed on Aug. 7, 2018.
Prior Publication US 2020/0051898 A1, Feb. 13, 2020
Int. Cl. H01L 23/495 (2006.01); H01L 21/48 (2006.01)
CPC H01L 23/49562 (2013.01) [H01L 21/4825 (2013.01); H01L 23/4952 (2013.01); H01L 23/49575 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A leadframe, comprising:
a first electrically conductive part and a second electrically conductive part, each having an outer surface arranged to provide substantially coplanar outer contact areas having a footprint and an inner surface opposing the outer surface, the first electrically conductive part being spaced apart from the second electrically conductive part by a gap;
a first recess arranged in the inner surface of the first electrically conductive part;
a second recess arranged in the inner surface of the second electrically conductive part; and
a first electrically conductive insert arranged in, and extending between, the first recess and the second recess and bridging the gap between the first electrically conductive part and the second electrically conductive part.