US 12,218,035 B2
Barrier structures between external electrical connectors
Chia-Chun Miao, Taichung (TW); Kai-Chiang Wu, Hsinchu (TW); and Shih-Wei Liang, Dajia Township (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 4, 2022, as Appl. No. 17/712,436.
Application 17/712,436 is a division of application No. 16/504,807, filed on Jul. 8, 2019, granted, now 11,296,012.
Application 16/504,807 is a continuation of application No. 15/601,702, filed on May 22, 2017, granted, now 10,347,563, issued on Jul. 9, 2019.
Application 15/601,702 is a continuation of application No. 14/147,338, filed on Jan. 3, 2014, granted, now 9,698,079, issued on Jul. 4, 2017.
Prior Publication US 2022/0230940 A1, Jul. 21, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/525 (2006.01)
CPC H01L 23/481 (2013.01) [H01L 24/04 (2013.01); H01L 24/07 (2013.01); H01L 24/10 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 23/3114 (2013.01); H01L 23/3192 (2013.01); H01L 23/525 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2224/02245 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/03424 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03464 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05015 (2013.01); H01L 2224/05022 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05164 (2013.01); H01L 2224/05562 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/10126 (2013.01); H01L 2224/10145 (2013.01); H01L 2224/11013 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/11916 (2013.01); H01L 2224/13109 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/1413 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/00011 (2013.01); H01L 2924/013 (2013.01); H01L 2924/01322 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a passivation layer over a substrate;
a first interconnect structure on and extending through the passivation layer, the first interconnect structure comprising a first post-passivation interconnect (PPI) pad, a first transition portion, and a first via portion;
a barrier surrounding a portion of the first PPI pad, the barrier having at least one gap in a plan view, the barrier comprising:
a first barrier portion disposed adjacent the first PPI pad, a first bottom surface of the first barrier portion being in direct contact with an upper surface of the passivation layer opposite the substrate, the first barrier portion disposed on the first transition portion of the first interconnect structure, a second bottom surface of the first barrier portion being in direct contact with an upper surface of the first interconnect structure, wherein the first bottom surface is connected to the second bottom surface by a side portion of the first barrier portion extending along a sidewall of the first interconnect structure; and
a second barrier portion adjacent the first PPI pad; and
a first eutectic connector disposed between the first barrier portion and the second barrier portion, a height of the first eutectic connector controlled by a height of the first barrier portion and a height of the second barrier portion.