US 12,218,023 B2
Semiconductor package and method of forming the same
Yu-Sheng Lin, Hsinchu County (TW); Chin-Hua Wang, New Taipei (TW); Shu-Shen Yeh, Taoyuan (TW); Chien-Hung Chen, Taipei (TW); Po-Yao Lin, Hsinchu County (TW); and Shin-Puu Jeng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 21, 2023, as Appl. No. 18/515,264.
Application 18/515,264 is a continuation of application No. 17/460,356, filed on Aug. 30, 2021, granted, now 11,854,929.
Prior Publication US 2024/0087974 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/48 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01)
CPC H01L 23/3185 (2013.01) [H01L 21/563 (2013.01); H01L 21/78 (2013.01); H01L 23/3192 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/16235 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a redistribution structure;
a first semiconductor device disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface, the first sub-surface is connected with the first bottom surface, the second sub-surface is connected with the first top surface, a first obtuse angle is between the first sub-surface and the first bottom surface, and a first acute angle is between the second sub-surface and the first top surface;
a second semiconductor device disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface, the third sub-surface is connected with the second bottom surface, the fourth sub-surface is connected with the second top surface, a second obtuse angle is between the third sub-surface and the second bottom surface, and a second acute angle is between the fourth sub-surface and the second top surface;
an underfill layer between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure; and
an encapsulant encapsulating the first semiconductor device, the second semiconductor device and the underfill layer.