| CPC H01L 21/76808 (2013.01) [H01L 23/481 (2013.01); H01L 21/76832 (2013.01)] | 20 Claims |
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1. A semiconductor device, comprising:
a first interlayer insulating film;
a first connecting wire in the first interlayer insulating film;
a lower etching stopper film on the first interlayer insulating film;
a resistance pattern on the lower etching stopper film;
a first etching stopper film on the lower etching stopper film, the first etching stopper film extending parallel to a top surface of the first interlayer insulating film;
a second etching stopper film spaced apart from the resistance pattern, the second etching stopper film extending parallel to a top surface of the resistance pattern;
a third etching stopper film connecting the first etching stopper film and the second etching stopper film;
an upper etching stopper film between the resistance pattern and the second etching stopper film;
a second interlayer insulating film on the first etching stopper film and the second etching stopper film;
a first wire via trench exposing the first connecting wire through the first etching stopper film and the lower etching stopper film;
a resistance via trench exposing the resistance pattern through the second etching stopper film and the upper etching stopper film;
a first wire via filling the first wire via trench; and
a resistance via filling the resistance via trench,
wherein:
the first wire via and the resistance via include a barrier film extending along sidewalls and a bottom of the first wire via trench and sidewalls and a bottom of the resistance via trench,
the barrier film includes a first region in contact with the second etching stopper film and a second region in contact with the second interlayer insulating film, and
a profile of a sidewall of the first region is different from a profile of a sidewall of the second region.
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