US 12,218,000 B2
Semiconductor processing method
HeeSung Kang, Anyang-si (KR)
Assigned to ASM IP Holding B.V., Almere (NL)
Filed by ASM IP Holding B.V., Almere (NL)
Filed on Sep. 22, 2021, as Appl. No. 17/481,979.
Claims priority of provisional application 63/083,764, filed on Sep. 25, 2020.
Prior Publication US 2022/0102190 A1, Mar. 31, 2022
Int. Cl. H01L 21/764 (2006.01); H01L 21/768 (2006.01)
CPC H01L 21/764 (2013.01) [H01L 21/7682 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A substrate processing method comprising:
forming a first insulating layer having a first step coverage on a patterned structure including a first protrusion and a second protrusion;
forming, on the first insulating layer, a second insulating layer having a second step coverage lower than the first step coverage;
forming an air gap between the first protrusion and the second protrusion by repeating the forming of the second insulating layer;
removing a by-product remaining between the first protrusion and the second protrusion,
wherein the by-product is removed while repeating the forming of the second insulating layer, and
wherein the by-product comprises at least one of a source gas, a molecule detached from or dangling-bonded to a molecule layer formed on an inner surface of the gap between the first and second protrusions, molecular fragments comprising the source gas, or a reaction gas.