US 12,217,984 B2
Wafer processing apparatus including EFEM and method of processing wafer
Jinhyuk Choi, Suwon-si (KR); Myungki Song, Hwaseong-si (KR); Kongwoo Lee, Seoul (KR); Kyusang Lee, Suwon-si (KR); Beomsoo Hwang, Seoul (KR); Keonwoo Kim, Yongin-si (KR); and Jonghwi Seo, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 18, 2022, as Appl. No. 17/722,838.
Claims priority of application No. 10-2021-0121178 (KR), filed on Sep. 10, 2021.
Prior Publication US 2023/0080991 A1, Mar. 16, 2023
Int. Cl. H01L 21/67 (2006.01); H01L 21/677 (2006.01); H01L 21/687 (2006.01)
CPC H01L 21/67184 (2013.01) [H01L 21/67201 (2013.01); H01L 21/67778 (2013.01); H01L 21/68707 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A wafer processing apparatus comprising:
a first equipment front end module (EFEM) comprising:
a first EFEM chamber;
a plurality of first load ports provided at at least one from among a first side and a second side of the first EFEM chamber, and configured to support a first wafer carrier accommodating a first wafer;
a first load lock provided at the first side or the second side of the first EFEM chamber and vertically overlapping with at least one from among the plurality of first load ports; and
a first EFEM arm configured to be moved within the first EFEM chamber to unload the first wafer from the first wafer carrier and load the first wafer into the first load lock, or to unload the first wafer from the first load lock and load the first wafer into the first wafer carrier;
a second EFEM provided at the first side of the first EFEM and comprising:
a second EFEM chamber spaced apart from the first EFEM chamber;
a plurality of second load ports provided at at least one from among a first side and a second side of the second EFEM chamber and configured to support a second wafer carrier accommodating a second wafer;
a second load lock provided at the first side or the second side of the second EFEM chamber and vertically overlapping with at least one from among the plurality of second load ports; and
a second EFEM arm configured to be moved within the second EFEM chamber to unload the second wafer from the second wafer carrier and load the second wafer into the second load lock, or to unload the second wafer from the second load lock and load the second wafer into the second wafer carrier;
a wafer transfer chamber connected to the first load lock of the first EFEM and the second load lock of the second EFEM;
a plurality of wafer processing chambers connected to the wafer transfer chamber; and
a wafer transfer arm provided in the wafer transfer chamber and configured to supply at least one of the first wafer and the second wafer to at least one from among the plurality of wafer processing chambers.