US 12,217,971 B2
Method for forming semiconductor device
Ching-Yu Chang, Taipei (TW); Jei-Ming Chen, Tainan (TW); and Tze-Liang Lee, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Aug. 2, 2021, as Appl. No. 17/391,660.
Claims priority of provisional application 63/168,764, filed on Mar. 31, 2021.
Prior Publication US 2022/0319862 A1, Oct. 6, 2022
Int. Cl. H01L 21/311 (2006.01); H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 21/02 (2006.01); H01L 21/8234 (2006.01)
CPC H01L 21/31144 (2013.01) [H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/76816 (2013.01); H01L 23/528 (2013.01); H01L 21/02186 (2013.01); H01L 21/76802 (2013.01); H01L 21/823475 (2013.01)] 20 Claims
OG exemplary drawing
 
6. A method, comprising:
forming a dielectric layer over a substrate;
forming a patterned amorphous silicon layer over the dielectric layer;
depositing a first spacer layer over the patterned amorphous silicon layer;
depositing a second spacer layer over the first spacer layer to form a bilayer spacer film including the first spacer layer and the second spacer layer;
forming a hard mask covering a first horizontal portion of the bilayer spacer film, wherein a top surface of the hard mask is lower than a topmost position of the bilayer spacer film;
performing an etching process to remove a second horizontal portion of the bilayer spacer film not covered by the hard mask, wherein the first horizontal portion of the bilayer spacer film and a vertical portion of the bilayer spacer film along a sidewall of the patterned amorphous silicon layer remain after the etching process is complete; and
etching the dielectric layer by using the remaining first horizontal portion and vertical portion of the bilayer spacer film and the hard mask as an etch mask.