US 12,217,957 B2
Engineered substrate structures for power and RF applications
Vladimir Odnoblyudov, Danville, CA (US); Cem Basceri, Los Gatos, CA (US); and Shari Farrens, Boise, ID (US)
Assigned to Qromis, Inc., Santa Clara, CA (US)
Filed by QROMIS, Inc., Santa Clara, CA (US)
Filed on Jan. 31, 2023, as Appl. No. 18/104,148.
Application 17/835,596 is a division of application No. 16/931,049, filed on Jul. 16, 2020, granted, now 11,387,101, issued on Jul. 12, 2022.
Application 16/931,049 is a division of application No. 16/287,782, filed on Feb. 27, 2019, granted, now 10,763,109, issued on Sep. 1, 2020.
Application 16/287,782 is a division of application No. 15/621,335, filed on Jun. 13, 2017, granted, now 10,297,445, issued on May 21, 2019.
Application 18/104,148 is a continuation of application No. 17/835,596, filed on Jun. 8, 2022, granted, now 12,009,205.
Claims priority of provisional application 62/350,084, filed on Jun. 14, 2016.
Prior Publication US 2023/0178367 A1, Jun. 8, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/02 (2006.01); C23C 16/24 (2006.01); C23C 16/30 (2006.01); C23C 16/34 (2006.01); C30B 25/18 (2006.01); C30B 29/06 (2006.01); C30B 29/40 (2006.01); C30B 29/68 (2006.01); C30B 33/06 (2006.01); C30B 33/08 (2006.01); H01L 21/74 (2006.01); H01L 21/8252 (2006.01); H01L 23/535 (2006.01); H01L 29/20 (2006.01); H01L 21/762 (2006.01); H01L 29/778 (2006.01); H01L 29/80 (2006.01)
CPC H01L 21/0242 (2013.01) [C23C 16/24 (2013.01); C23C 16/303 (2013.01); C23C 16/345 (2013.01); C30B 25/18 (2013.01); C30B 29/06 (2013.01); C30B 29/406 (2013.01); C30B 29/68 (2013.01); C30B 33/06 (2013.01); C30B 33/08 (2013.01); H01L 21/02428 (2013.01); H01L 21/0245 (2013.01); H01L 21/02488 (2013.01); H01L 21/02491 (2013.01); H01L 21/02505 (2013.01); H01L 21/02532 (2013.01); H01L 21/0254 (2013.01); H01L 21/743 (2013.01); H01L 21/8252 (2013.01); H01L 23/535 (2013.01); H01L 29/2003 (2013.01); H01L 21/76254 (2013.01); H01L 29/7783 (2013.01); H01L 29/802 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A substrate comprising:
a support structure comprising:
a polycrystalline ceramic core;
a first adhesion layer encapsulating the polycrystalline ceramic core;
a conductive layer coupled to the first adhesion layer;
a second adhesion layer coupled to the conductive layer;
a barrier layer encapsulating the first adhesion layer;
the second adhesion layer coupled to the barrier layer; and
the conductive layer coupled to the second adhesion layer;
a bonding layer coupled to the support structure;
a substantially single crystal silicon layer coupled to the bonding layer;
an epitaxial semiconductor layer coupled to the substantially single crystal silicon layer; and
an epitaxial III-V layer coupled to the epitaxial semiconductor layer.