US 12,217,786 B2
Memory device, memory system having the same and operating method thereof
Hijung Kim, Suwon-si (KR); Hoyoun Kim, Suwon-si (KR); Jungmin You, Suwon-si (KR); and Seongjin Cho, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 22, 2024, as Appl. No. 18/613,361.
Application 18/613,361 is a continuation of application No. 17/735,542, filed on May 3, 2022, granted, now 11,961,550.
Claims priority of application No. 10-2021-0158856 (KR), filed on Nov. 17, 2021.
Prior Publication US 2024/0233803 A1, Jul. 11, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/00 (2006.01); G06F 7/544 (2006.01); G11C 11/406 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01)
CPC G11C 11/40622 (2013.01) [G06F 7/5443 (2013.01); G11C 11/40611 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An operating method of a memory device, the method comprising:
receiving a target row address;
generating victim point values for the target row address and at least one row address adjacent to the target row address;
updating a victim point table with the victim point values; and
performing a target refresh operation based on the victim point table at a predetermined time,
wherein the generating the victim point values comprises:
accumulating access count values corresponding to the target row address in each time period among a plurality of time periods; and
calculating the victim point values corresponding to the target row address based on the accumulated access count values.