| CPC G11C 11/1675 (2013.01) [G11C 11/1655 (2013.01); G11C 11/1697 (2013.01); H10B 61/22 (2023.02); H10N 50/10 (2023.02)] | 14 Claims |

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1. A semiconductor storage, comprising:
two power source paths that include a low-side path and a high-side path, wherein
each of the two power source paths includes a power gate transistor and a current source transistor, and
the power gate transistor and the current source transistor are coupled in series;
a connection path that connects an end of each of the two power source paths on a side of a respective current source transistor of each of the two power source paths;
a storage element;
a switch element between the connection path and the storage element, wherein a first back gate is coupled to a first internal node in the respective current source transistor of the low-side path of the two power source paths; and
a control circuit configured to:
control each of the power gate transistor, the current source transistor and the switch element;
select one of the low-side path or the high-side path based on the control of each of the power gate transistor, the current source transistor, and the switch element;
supply, via the switch element, current from the selected one of the low-side path or the high-side path to the storage element; and
write on the storage element based on the supplied current.
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