| CPC G09G 3/3677 (2013.01) [G09G 3/3266 (2013.01); G09G 2310/08 (2013.01)] | 15 Claims |
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1. A clock signal conditioning circuit comprising:
a signal conversion circuit, wherein an input terminal of the signal conversion circuit is configured to be connected to a (N+1)-th clock signal output terminal, an output terminal of the signal conversion circuit is configured to output a converted electrical signal, and the (N+1)-th clock signal output terminal is configured to be connected to the (N+1)-th stage GOA drive circuit; and a delay processing circuit configured to receive the converted electrical signal transmitted from the signal conversion circuit; wherein the delay processing circuit is further configured to receive an N-th clock signal transmitted from the N-th clock signal output terminal when a voltage amplitude of the converted electrical signal falls within a turn-on threshold range, perform delay processing on the N-th clock signal based on a preset interval clock signal, to obtain a delayed clock signal, and transmit the delayed clock signal to the (N+1)-th stage GOA drive circuit; and a timing of the delayed clock signal is the same as a timing of the (N+1)-th clock signal output from the (N+1)-th clock signal output terminal,
wherein the delay processing circuit comprises:
a switch circuit, wherein a control terminal of the switch circuit is configured to receive the converted electrical signal, and an input terminal of the switch circuit is configured to be connected to the N-th clock signal output terminal; and
a delay circuit, wherein a first input terminal of the delay circuit is connected to the output terminal of the switch circuit, a second input terminal of the delay circuit is configured to receive a preset interval clock signal; the output terminal of the delay circuit is configured to be connected to the (N+1)-th stage GOA drive circuit, and
wherein when no signal is output from the (N+1)-th clock signal output terminal, the voltage amplitude of the converted electrical signal falls within the turn-on threshold range of the switch circuit.
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