| CPC G09G 3/3275 (2013.01) [G09G 3/2092 (2013.01); G09G 2300/0417 (2013.01); G09G 2300/0857 (2013.01); G09G 2320/0285 (2013.01); G09G 2360/16 (2013.01)] | 20 Claims |

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1. A data compensating circuit comprising:
a stress data generating block which generates stress data for each pixel based on input image data or output image data, wherein the stress data for each pixel is a value corresponding to a gray-level for each pixel of the input image data or the output image data;
a memory control block which updates accumulated stress data for each pixel by accumulating the stress data for each pixel in a first non-volatile memory device, wherein the accumulated stress data for each pixel is a value generated by accumulating the value corresponding to the gray-level for each pixel of the input image data or the output image data;
a first compensating block which reads the accumulated stress data for each pixel from the first non-volatile memory device during a state changing period in which a state of a display device is changed from a sleep state or a turn-off state to a turn-on state and generates afterimage compensation data for each pixel based on the accumulated stress data for each pixel during the state changing period in which the state of the display device is changed from the sleep state or the turn-off state to the turn-on state;
a compensation data summing block which reads optical compensation data for each pixel from a second non-volatile memory device during the state changing period in which the state of the display device is changed from the sleep state or the turn-off state to the turn-on state, receives the afterimage compensation data for each pixel from the first compensating block during the state changing period in which the state of the display device is changed from the sleep state or the turn-off state to the turn-on state, and generates luminance compensation data for each pixel by summing the afterimage compensation data for each pixel and the optical compensation data for each pixel during the state changing period in which the state of the display device is changed from the sleep state or the turn-off state to the turn-on state, wherein the second non-volatile memory device is physically separate from the first non-volatile memory device, and the optical compensation data for each pixel includes information on a luminance compensation amount for each pixel corresponding to a luminance drop amount for each pixel due to optical characteristic deviation in a manufacturing process of the display device;
an internal memory device which receives and stores the luminance compensation data for each pixel from the compensation data summing block, wherein the internal memory device is a volatile memory device; and
a second compensating block which reads the luminance compensation data for each pixel from the internal memory device and generates the output image data by compensating for the input image data based on the luminance compensation data for each pixel.
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