| CPC G09G 3/3233 (2013.01) [G09G 2300/0852 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/045 (2013.01)] | 18 Claims |
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1. A pixel driving circuit, comprising:
a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a seventh thin film transistor, a first capacitor, a second capacitor, and a light-emitting device, the first thin film transistor configured as a driving thin film transistor of the light-emitting device;
wherein a gate of the first thin film transistor is electrically connected to a first node, and a drain of the first thin film transistor is electrically connected to a second node;
a gate of the second thin film transistor receives a first scan signal, a source of the second thin film transistor receives a data signal, and a drain of the second thin film transistor is electrically connected to the first node;
a gate of the third thin film transistor receives a light-emitting controlling signal, and a drain of the third thin film transistor is electrically connected to a source of the first thin film transistor;
a gate of the fourth thin film transistor receives the light-emitting controlling signal, a source of the fourth thin film transistor is electrically connected to the second node, and a drain of the fourth thin film transistor receives a ground voltage;
a gate of the fifth thin film transistor receives a second scan signal, a source of the fifth thin film transistor is connected to the first node, and a drain of the fifth thin film transistor is electrically connected to the drain of the third thin film transistor;
a gate of the sixth thin film transistor receives a third scan signal, a source of the sixth thin film transistor receives a power voltage, and a drain of the sixth thin film transistor is electrically connected to the first node;
a gate of the seventh thin film transistor receives a fourth scan signal, a source of the seventh thin film transistor receives a reference signal, and a drain of the seventh thin film transistor is electrically connected to the second node;
one end of the first capacitor is electrically connected to the first node, and another end of the first capacitor is electrically connected to the second node;
one end of the second capacitor is electrically connected to the first node, and another end of the second capacitor is electrically connected to the drain of the second thin film transistor; and
an anode of the light-emitting device receives the power voltage, and a cathode of the light-emitting device is electrically connected to a source of the third thin film transistor,
voltage levels of the first scan signal, the second scan signal, the third scan signal, the fourth scan signal, the light-emitting controlling signal, and the data signal are configured to form different voltage level combinations to correspond to an initialization stage, a threshold voltage extraction stage, a data writing stage, and a light-emitting stage in sequence.
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