| CPC G09G 3/3208 (2013.01) [G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01); G09G 2330/023 (2013.01)] | 19 Claims |
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1. A display device comprising:
a display panel including a plurality of pixels, wherein each of the plurality of pixels is connected to one of a plurality of data lines, one of a plurality of first scan lines, and at least one of a plurality of second scan lines;
a data driving circuit which drives the plurality of data lines;
a scan driving circuit which drives the plurality of first scan lines and the plurality of second scan lines; and
a driving controller which controls the data driving circuit and the scan driving circuit to drive a first display area of the display panel at a first operating frequency and to drive a second display area of the display panel at a second operating frequency lower than the first operating frequency while an operating mode is a multi-frequency mode,
wherein a first pixel in the second display area among the plurality of pixels includes:
a first transistor that is a driving transistor and including a first electrode, a second electrode outputting a driving current to a light emitting element, and a gate electrode;
a second transistor including a first electrode connected to a corresponding data line among the plurality of data lines, a second electrode electrically connected to the first electrode of the first transistor, and a gate electrode connected to a corresponding second scan line among the plurality of second scan lines; and
a third transistor including a first electrode connected to the second electrode of the first transistor, a second electrode connected to the gate electrode of the first transistor, and a gate electrode connected to a corresponding first scan line among the plurality of first scan lines,
wherein, during the multi-frequency mode, a second scan signal provided to the first pixel through the corresponding second scan line transitions to an active level at least twice in each of a first frame and a second frame, and a first scan signal provided to the first pixel through the corresponding first scan line is maintained at an inactive level in the second frame, whereby while the first scan signal is maintained at said inactive level in the second frame, the data driving circuit provides a bias voltage to pixels which correspond to the second display area, to minimize luminance variance of the second display area.
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