| CPC G09F 9/301 (2013.01) [H10K 50/844 (2023.02); H10K 59/121 (2023.02); H10K 59/131 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 2102/101 (2023.02)] | 15 Claims | 

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               1. A method of manufacturing a display device, the method comprising: 
            forming a plurality of individual substrates on a lower substrate; 
                forming a connection support layer extending between adjacent individual substrates; 
                forming a transistor on each of the plurality of individual substrates; 
                depositing a first inorganic layer on each of the individual substrates, the inorganic having a sidewall surface extending upward from the individual substrate; 
                depositing an organic layer overlying the individual substrates and the inorganic layer, including the sidewall of the inorganic layer and the lower substrate; 
                patterning and etching the organic layer to remove it from lower substrate; 
                depositing an electrically conductive connection layer overlying the connection support layer; 
                patterning and etching the electrically conductive connection layer to form a connection line extending between adjacent individual substrates; 
                wherein the step of forming the connection support includes: 
                etching of the connection support layer, 
                wherein the step of etching the connection support layer creates and undercut below the inorganic layer, the method further comprising: 
                filling the undercut with the organic layer during the step of depositing the organic layer. 
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