US 12,217,083 B2
Hardware transactional memory-assisted flat combining
Alex Kogan, Needham, MA (US); and Yosef Lev, New York, NY (US)
Assigned to Oracle International Corporation, Redwood City, CA (US)
Filed by Oracle International Corporation, Redwood City, CA (US)
Filed on May 5, 2021, as Appl. No. 17/308,502.
Application 17/308,502 is a continuation of application No. 15/154,686, filed on May 13, 2016, granted, now 11,029,995.
Claims priority of provisional application 62/161,784, filed on May 14, 2015.
Prior Publication US 2021/0255889 A1, Aug. 19, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/46 (2006.01)
CPC G06F 9/467 (2013.01) 20 Claims
OG exemplary drawing
 
1. A method, comprising:
performing, by one or more computing devices:
adding, by a given thread of a plurality of threads, a descriptor of a given operation to a set of published operations associated with a concurrent data structure accessible by the plurality of threads;
attempting, by the given thread subsequent to said adding and without attempting to combine with any other operations from the set of published operations, execution of the given operation using a hardware transaction;
in response to a failure of said attempted execution by the given thread using the hardware transaction:
selecting, by the given thread, a subset of operations whose descriptors are included in the set of published operations to execute, wherein the subset comprises the given operation and one or more other operations of the plurality of operations; and
executing, by the given thread, the selected subset of operations using one or more hardware transactions, wherein said executing comprises applying the selected subset of operations to the concurrent data structure.