| CPC G06F 9/24 (2013.01) [G06F 9/223 (2013.01); G06F 9/3005 (2013.01); G06F 9/30185 (2013.01); G06F 9/3818 (2013.01)] | 6 Claims |

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1. A method for executing a machine code using a microprocessor comprising a hardware pipeline for processing instructions, the hardware processing pipeline comprising an instruction loader, a decoder and an arithmetic logic unit, the method comprising, for each instruction of the machine code to be executed, successively:
loading, using the instruction loader, an instruction designated by a program counter, to obtain a loaded instruction, then
decoding the loaded instruction, using the decoder, to generate signals that configure the microprocessor to execute the loaded instruction, then,
executing, using the arithmetic logic unit, the loaded instruction,
wherein the method also comprises:
after decoding a current loaded instruction and before the operation of executing, using the arithmetic logic unit, the loaded instruction, constructing a value of a mask from signals generated by the decoder in response to decoding of the current loaded instruction, the constructed mask thus varying as a function of the current loaded instruction in order to obtain a constructed mask, then
before decoding a next loaded instruction, unmasking the next loaded instruction using the constructed mask
wherein:
in response to detection that a loaded instruction is a branch instruction that, when executed by the arithmetic logic unit, replaces a value of a program counter with a new value, the new value depending on operands of the branch instruction, the method comprises unmasking the next loaded instruction using a pre-recorded jump mask that is constant and identical for all branch instructions executed by the microprocessor, and
in response to an absence of detection that the loaded instruction is a branch instruction, the method comprises unmasking the next loaded instruction using the constructed mask.
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