CPC G06F 30/398 (2020.01) [G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 2119/18 (2020.01)] | 20 Claims |
1. A system for generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks, the layout diagram being stored on a non-transitory computer-readable medium, the system comprising:
at least one processor; and
at least one memory including computer program code for one or more programs;
wherein the at least one memory, the computer program code and the at least one processor are configured to cause the system to execute generating the layout diagram including:
placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer;
determining whether the first candidate location results in a group of cut patterns which violates a design rule; and
temporarily preventing placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule; and
wherein:
the layout diagram is organized into rows, each row extending in a first direction;
the group of cut patterns further includes one or more other cut patterns at one or more locations over one or more corresponding portions of one or more other conductive patterns in the metallization layer; and
the determining whether the first candidate location results in a group of cut patterns which violates a design rule includes:
checking whether the given cut pattern and the one or more other cut patterns in the group are dispersed across the rows such that the group is multi-row group; and
checking whether a tally of cut patterns in the group is an odd number.
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