US 12,216,921 B1
Secure monitors for memory page protection
Erez Tsidon, Moreshet (IL); Ori Cohen, Atlit (IL); Barak Wasserstrom, Mizpe Aviv (IL); Andrew Robert Sinton, Jerusalem (IL); Asaf Modelevsky, Mizra (IL); and Moshe Raz, Pardesiya (IL)
Assigned to Amazon Technologies, Inc., Seattle, WA (US)
Filed by Amazon Technologies, Inc., Seattle, WA (US)
Filed on Mar. 31, 2022, as Appl. No. 17/710,489.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/062 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 19 Claims
OG exemplary drawing
 
6. A method comprising:
detecting, with a monitor comprising a first processing component embedded in computing hardware executing instructions to monitor memory operations in the computing hardware, a conflict between respective designations of an attribute of a selected page of a memory of the computing hardware in one or more translation buffers used by a second processing component of the computing hardware, wherein the conflict comprises two entries in the one or more translation buffers that point to a same physical address of the memory corresponding to the selected page, where a first entry of the two entries designates an executable attribute for the selected page and a second entry of the two entries designates a writeable attribute for the selected page; and
performing a first mitigation mechanism to mitigate the conflict in response to detecting the conflict, wherein the first mitigation includes intercepting a violating command or instruction to prevent a requested change to an attribute of the selected page or quarantining the computing hardware.