US 12,216,919 B2
External memory data integrity validation
Barak Cherches, Ramat Ha'Kovesh (IL); and Uri Weinrib, Mazkeret Batya (IL)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Nov. 20, 2023, as Appl. No. 18/514,547.
Application 18/514,547 is a continuation of application No. 17/527,865, filed on Nov. 16, 2021, granted, now 11,861,179.
Prior Publication US 2024/0086081 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0655 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A device comprising:
a first storage; and
a processing circuit configured to:
determine, during a boot or startup sequence of a controller, a first authentication value for a first block of a second storage, the first block of the second storage including executable code;
store a first snippet in the first storage, the first snippet being based on the first authentication value;
determine, at run-time of the controller, data integrity of the first block, wherein determining the data integrity of the first block comprises:
determining a second authentication value of the first block, and
comparing a second snippet with the first snippet to generate a comparison result, the second snippet being based on the second authentication value,
responsive to the comparison result indicating the first and second snippets do not match, halt or prevent the executable code from running in the controller, or prevent the controller from receiving the executable code, or provide a fault signal; and
responsive to the comparison result indicating the first and second snippets match, allow the controller to execute the executable code.