| CPC G06F 3/0619 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |

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1. A storage device comprising: a non-volatile memory including a plurality of memory regions; and a storage controller including a plurality of cores and a buffer memory configured to store recovery data, the storage controller configured to communicate with the non-volatile memory through both a performance path that includes the plurality of cores and at least one direct path of a plurality of direct paths each corresponding to one of the plurality of cores in which at least one of the plurality of cores is directly connected to the non-volatile memory without traversing other direct paths of ones of the plurality of cores, the storage controller configured to communicate with the non-volatile memory by, communicating with the non-volatile memory via the performance path during normal operation, in which the plurality of cores operate together to perform a write operation, a read operation or an erase operation, detecting whether a fault is present in performance of the performance path, in response to a power being cut-off to the storage device, and in response to the fault being detected as present in the performance path while the power remains cut-off, moving the recovery data from the buffer memory to the non-volatile memory by transmitting the recovery data to the non-volatile memory through the at least one direct path, wherein the performance path is for performing the write operation, the read operation, and the erase operation, and wherein the at least one direct path is for performing only the write operation.
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