US 12,216,912 B2
Operation method of memory controller configured to control memory device
Seonghyeog Choi, Hwaseong-si (KR); Dong-Min Shin, Seoul (KR); Hong Rak Son, Anyang-si (KR); Hyeonjong Song, Suwon-si (KR); and Yeongcheol Jo, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 11, 2022, as Appl. No. 17/885,823.
Claims priority of application No. 10-2021-0124657 (KR), filed on Sep. 17, 2021.
Prior Publication US 2023/0092380 A1, Mar. 23, 2023
Int. Cl. G06F 3/00 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An operation method of a memory controller which is configured to control a memory device, the method comprising:
storing write data in a first area of the memory device;
extracting first error position information indicating a position of at least one error included in data stored in the first area; the extracting the first error position information being performed in response to the storing the write data,
storing the first error position information in a second area of the memory device;
reading read data from the first area of the memory device;
reading the first error position information from the second area of the memory device;
refining the read data based on the first error position information to generate refined data;
performing soft decision decoding based on the refined data to generate corrected data; and
outputting the corrected data.