US 12,216,907 B2
Method of improving programming operations in 3D NAND systems
Zhe Luo, Hubei (CN); Da Li, Hubei (CN); Feng Xu, Hubei (CN); Yaoyao Tian, Hubei (CN); Jianquan Jia, Hubei (CN); and XiangNan Zhao, Hubei (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Dec. 15, 2022, as Appl. No. 18/082,265.
Claims priority of application No. 202211487045.7 (CN), filed on Nov. 23, 2022.
Prior Publication US 2024/0168640 A1, May 23, 2024
Int. Cl. G06F 3/06 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0679 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for programming a memory device, the method comprising:
performing a programming operation on a memory cell, wherein the memory cell is connected to a bit line and is controlled by a word line, wherein performing the programming operation comprises:
applying a first programming voltage signal to the word line to program the memory cell into a first programmed state;
applying a first voltage to the bit line;
subsequent to the applying the first voltage, performing a verify operation when the memory cell is in a second programmed state different from the first programmed state, wherein a second verify voltage of the second programmed state is lower than a first verify voltage of the first programmed state;
determining a classification of the memory cell based on the verify operation;
applying a second voltage to the bit line based on the determined classification;
applying a second programming voltage signal to the word line to program the memory cell into the first programmed state;
applying a third voltage to the bit line;
applying a third programming voltage signal to the word line to program the memory cell into the first programmed state; and
applying a fourth voltage to the bit line.