US 12,216,905 B2
Write booster buffer flush operation
Xing Wang, Shanghai (CN); Wenyu Li, Shanghai (CN); Xiaolai Zhu, Shanghai (CN); and Xu Zhang, Shanghai (CN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Appl. No. 17/632,099
Filed by Micron Technology, Inc., Boise, ID (US)
PCT Filed Mar. 19, 2021, PCT No. PCT/CN2021/081755
§ 371(c)(1), (2) Date Sep. 22, 2022,
PCT Pub. No. WO2022/193270, PCT Pub. Date Sep. 22, 2022.
Prior Publication US 2023/0376206 A1, Nov. 23, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0656 (2013.01); G06F 3/0679 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A memory system, comprising:
one or more memory devices; and
one or more controllers coupled with the one or more memory devices and configured to cause the memory system to:
receive a command to transfer information from a write booster buffer to a storage space of the one or more memory devices, the write booster buffer comprising a first plurality of blocks and the storage space comprising a second plurality of blocks;
reassign, based at least in part on receiving the command, a valid block of the write booster buffer to the storage space and an invalid block of the storage space to the write booster buffer, the valid block storing a portion of the information stored in the write booster buffer and the invalid block available to store information, wherein the reassigning is based at least in part on a quantity of invalid blocks of the storage space satisfying a threshold quantity of invalid blocks, the threshold quantity being associated with a quantity of blocks of the quantity of invalid blocks triggering a garbage collection operation on the storage space; and
transfer the portion of the information stored in the valid block to a block of multiple level memory cells of the storage space after reassigning the valid block to the storage space and reassigning the invalid block to the write booster buffer.