US 12,216,589 B2
Draining operation for draining dirty cache lines to persistent memory
Wei Wang, Cambridge (GB); and Matthew James Horsnell, Cambridge (GB)
Assigned to Arm Limited, Cambridge (GB)
Appl. No. 18/044,499
Filed by Arm Limited, Cambridge (GB)
PCT Filed Aug. 16, 2021, PCT No. PCT/GB2021/052120
§ 371(c)(1), (2) Date Mar. 8, 2023,
PCT Pub. No. WO2022/053774, PCT Pub. Date Mar. 17, 2022.
Claims priority of application No. 2014440 (GB), filed on Sep. 14, 2020.
Prior Publication US 2023/0325325 A1, Oct. 12, 2023
Int. Cl. G06F 12/12 (2016.01); G06F 9/46 (2006.01); G06F 9/52 (2006.01); G06F 12/0862 (2016.01); G06F 12/0897 (2016.01)
CPC G06F 12/12 (2013.01) [G06F 9/467 (2013.01); G06F 9/528 (2013.01); G06F 12/0862 (2013.01); G06F 12/0897 (2013.01); G06F 2212/601 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
processing circuitry to support processing of a transaction comprising instructions processed speculatively between a transaction start instruction and a transaction end instruction, for which the processing circuitry is configured to prevent commitment of results of the speculatively processed instructions until the transaction end instruction is reached in the absence of the transaction being aborted; and
a cache hierarchy comprising at least two levels of cache; in which:
in response to a store instruction processed within a transaction, the processing circuitry is configured to write speculative store data to the cache hierarchy with the speculative store data marked as speculative to prevent the speculative store data passing beyond a predetermined level cache in the cache hierarchy to at least one further level cache until the transaction is committed; and
the apparatus comprises draining circuitry to detect a draining trigger event having potential to cause loss of state stored in the at least one further level cache, and in response to detection of the draining trigger event, to perform a draining operation to scan a subset of the cache hierarchy to identify dirty cache lines and write data associated with the dirty cache lines to persistent memory, the subset of the cache hierarchy comprising the at least one further level cache, where in the draining operation, the draining circuitry is configured to ensure that dirty cache lines storing speculative store data marked as speculative in the predetermined level cache are prevented from being drained to the persistent memory.