US 12,216,579 B2
Adaptive remote atomics
Carl J. Beckmann, Newton, MA (US); Samantika S. Sury, Westford, MA (US); Christopher J. Hughes, Santa Clara, CA (US); Lingxiang Xiang, Santa Clara, CA (US); and Rahul Agrawal, Cupertino, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 25, 2020, as Appl. No. 17/134,254.
Prior Publication US 2022/0206945 A1, Jun. 30, 2022
Int. Cl. G06F 12/0811 (2016.01); G06F 12/0817 (2016.01); G06F 12/084 (2016.01); G06F 12/0862 (2016.01)
CPC G06F 12/0811 (2013.01) [G06F 12/0822 (2013.01); G06F 12/084 (2013.01); G06F 12/0862 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a plurality of processor cores, including a first processor core;
a cache hierarchy including a local cache at a first level and a shared cache at a second level, wherein the first level is closer to a first processor core than the second level is to the first processor core;
a local execution unit to perform a first atomic operation of a plurality of atomic operations at the first level if the local cache is storing a cache line including data for the atomic operation;
a remote execution unit to perform the first atomic operation at the second level;
an adaptive remote atomic operation unit to determine whether to perform the first atomic operation at the first level or at the second level and whether to copy the cache line from the shared cache to the local cache; and
storage for a snoop filter having entries with a field to track which of the plurality of processor cores have a copy of the cache line, wherein at least a portion of the field is repurposed to store an identifier of a last processor core to request an atomic operation involving the cache line.