| CPC G06F 11/004 (2013.01) [G06F 12/023 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/2022 (2013.01)] | 25 Claims |

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1. A memory system, comprising:
one or more memory devices; and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
receive a command to write data to the memory system;
assign the data to one or more pages associated with a cursor of the memory system based at least in part on the command;
generate error protection data for the data based at least in part on an error protection configuration; and
assign the error protection data to an error protection buffer that is stored to a nonvolatile memory of the memory system and is common to a plurality of cursors of the memory system based at least in part on generating the error protection data, the error protection buffer for storing a plurality of error protection data associated with the plurality of cursors of the memory system.
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