US 12,216,368 B2
Display panel and display device
Hui Wang, Beijing (CN); Yuqi Liu, Beijing (CN); Qianqian Zhang, Beijing (CN); Yanni Liu, Beijing (CN); Yijun Wang, Beijing (CN); Sheng Wang, Beijing (CN); and Junsheng Chen, Beijing (CN)
Assigned to Hefei BOE Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/272,343
Filed by Hefei BOE Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Nov. 29, 2021, PCT No. PCT/CN2021/133896
§ 371(c)(1), (2) Date Jul. 13, 2023,
PCT Pub. No. WO2023/092536, PCT Pub. Date Jun. 1, 2023.
Prior Publication US 2024/0077771 A1, Mar. 7, 2024
Int. Cl. G02F 1/1347 (2006.01); G02F 1/1335 (2006.01); G02F 1/13357 (2006.01); G02F 1/1362 (2006.01)
CPC G02F 1/1347 (2013.01) [G02F 1/133512 (2013.01); G02F 1/133531 (2021.01); G02F 1/133606 (2013.01); G02F 1/136286 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A display panel, comprising: a first panel and a second panel opposite to the first panel;
wherein the first panel comprises: gate lines extending along a first direction and data lines extending along a second direction, and the gate lines and the data lines intersect to define pixel regions; and
the second panel comprises: a plurality of support column periodic units arranged in an array along the first direction and the second direction, each of the plurality of support column periodic units comprises a plurality of support columns, and at least a part of the support columns each satisfy: an imaginary connection line between the support column and a support column closest thereto extends along a third direction, and an included angle between the third direction and the first direction is not equal to 0°,
wherein the first panel comprises a plurality of pixel regions each comprising a transistor and a pixel electrode, the pixel electrode comprises a plurality of first branch electrodes extending along a fourth direction and a plurality of second branch electrodes extending along a fifth direction, and the first branch electrodes are connected to the second branch electrodes;
the transistor has a gate electrode connected to a corresponding gate line, a source electrode connected to a corresponding data line, and a drain electrode connected to a corresponding pixel electrode; and
each of the data lines comprises a first portion and a second portion alternately arranged, the first portion is connected to the second portion, the first portion extends along the fourth direction, the second portion extends along the fifth direction, the first portion and the first branch electrodes are arranged along the first direction, and the second portion and the second branch electrodes are arranged along the first direction,
wherein a plurality of support columns in the second panel form a plurality of support column groups, and each of the plurality of support column groups comprises a plurality of support columns arranged along the third direction, and each support column in the support column group satisfies: an imaginary connection line between the support column and a support column closest thereto extends along the third direction,
wherein the plurality of support columns in each of the plurality of support column periodic units comprise: at least one main support column and a plurality of auxiliary support columns; and a ratio of the number of the at least one main support columns to the number of the plurality of auxiliary support columns in each of the plurality of the support column periodic units is in the range of 1:50 to 1:10,
wherein, in a direction perpendicular to the second panel, a part of main support columns in the second panel overlap the plurality of first branch electrodes in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel overlap the plurality of second branch electrodes in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel overlap the data lines in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the main support columns in the second panel at least partially overlap the gate lines in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of auxiliary support columns in the second panel overlap the plurality of first branch electrodes in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the plurality of second branch electrodes in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the data lines in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap the gate lines in the first display panel;
and/or, in the direction perpendicular to the second panel, a part of the auxiliary support columns in the second panel overlap transistors in the first display panel.