US 12,216,159 B2
Circuit and method to measure simulation to silicon timing correlation
Ashish Kumar Nayak, San Jose, CA (US); Hugh Thomas Mair, San Jose, CA (US); Anshul Varma, San Jose, CA (US); and Anand Rajagopalan, San Jose, CA (US)
Assigned to MEDIATEK SINGAPORE PTE. LTD., Singapore (SG)
Filed by MediaTek Singapore Pte. Ltd., Singapore (SG)
Filed on Nov. 16, 2023, as Appl. No. 18/510,835.
Application 18/510,835 is a continuation of application No. 17/397,879, filed on Aug. 9, 2021, granted, now 11,835,580.
Claims priority of provisional application 63/119,672, filed on Dec. 1, 2020.
Prior Publication US 2024/0085475 A1, Mar. 14, 2024
Int. Cl. H03K 3/03 (2006.01); G01R 31/30 (2006.01); G01R 31/317 (2006.01); G01R 31/3193 (2006.01); H03K 5/134 (2014.01)
CPC G01R 31/31725 (2013.01) [G01R 31/3016 (2013.01); G01R 31/31937 (2013.01); H03K 3/0315 (2013.01); H03K 5/134 (2014.07)] 5 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a programmable ring oscillator comprising a delay path, the programmable ring oscillator being configured to propagate a first oscillator signal and a second oscillator signal along the delay path; and
a controller configured to determine a central tendency of propagation delay of the programmable ring oscillator using the first and second oscillator signals,
wherein the delay path comprises a plurality of oscillator stages, oscillator stages of the plurality of oscillator stages being switchable into and out of the delay path based on a plurality of respective control signals, the controller further configured to:
provide the plurality of control signals to the programmable ring oscillator;
obtain the first oscillator signal and the second oscillator signal from the programmable ring oscillator; and
determine first and second pulse widths of the first and second oscillator signals.