US 12,215,439 B2
SiC epitaxial wafer
Hiromasa Suo, Tokyo (JP); Rimpei Kindaichi, Tokyo (JP); and Tamotsu Yamashita, Tokyo (JP)
Assigned to Resonac Corporation, Tokyo (JP)
Filed by Resonac Corporation, Tokyo (JP)
Filed on Nov. 29, 2023, as Appl. No. 18/523,840.
Application 18/523,840 is a continuation of application No. 18/310,645, filed on May 2, 2023, granted, now 11,866,846.
Claims priority of application No. 2022-089089 (JP), filed on May 31, 2022.
Prior Publication US 2024/0093406 A1, Mar. 21, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. C30B 29/36 (2006.01)
CPC C30B 29/36 (2013.01) 5 Claims
OG exemplary drawing
 
1. A SiC epitaxial wafer comprising:
a SiC substrate; and
a SiC epitaxial layer stacked on one surface of the SiC substrate, wherein,
a diameter of the SiC substrate is 195 mm or more, and
a warp is 50 μm or less.