US 11,889,703 B2
Magnetic junction memory device and reading method thereof
Chan Kyung Kim, Hwaseong-si (KR); Eun Ji Lee, Seongnam-si (KR); Ji Yean Kim, Hwaseong-si (KR); Tae Seong Kim, Yongin-si (KR); and Jae Wook Joo, Daejeon (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 27, 2022, as Appl. No. 17/975,242.
Application 17/975,242 is a continuation of application No. 16/798,615, filed on Feb. 24, 2020, granted, now 11,515,357.
Claims priority of application No. 10-2019-0086740 (KR), filed on Jul. 18, 2019.
Prior Publication US 2023/0051494 A1, Feb. 16, 2023
Int. Cl. H10B 61/00 (2023.01); G11C 11/16 (2006.01); H10N 50/10 (2023.01)
CPC H10B 61/20 (2023.02) [G11C 11/1659 (2013.01); G11C 11/1673 (2013.01); H10N 50/10 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A magnetic junction memory device comprising:
a first single-transistor common-gate amplifier circuit including a first transistor which is gated by a gating voltage and has a first end connected to a first sensing node, the first single-transistor common-gate amplifier circuit configured to determine a voltage of the first sensing node by applying a first read current to a first reference resistor;
a second single-transistor common-gate amplifier circuit including a second transistor which is gated by the gating voltage and has a first end connected to a second sensing node, the second single-transistor common-gate amplifier circuit configured to determine a voltage of the second sensing node by applying a second read current to a second reference resistor, which has a different resistance from the first reference resistor; and
a third single-transistor common-gate amplifier circuit including a third transistor which is gated by the gating voltage and has a first end connected to a third sensing node, the third single-transistor common-gate amplifier circuit configured to determine a voltage of the third sensing node by applying a third read current to a magnetic junction memory cell.