CPC H10B 61/00 (2023.02) [G11C 11/161 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H01F 10/3272 (2013.01); H01F 10/3286 (2013.01); H10N 50/80 (2023.02); H10N 50/85 (2023.02)] | 20 Claims |
1. A magnetoelectric memory device, comprising:
a first electrode;
a second electrode;
a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising, along a direction from the first electrode toward the second electrode, a first reference layer, a nonmagnetic tunnel barrier layer, a first nonmagnetic metal dust layer, a free layer including a first component free layer and a second component free layer that are spaced from each other by a second nonmagnetic metal dust layer; and
a dielectric capping layer located between the magnetic tunnel junction and the second electrode.
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