CPC H10B 12/053 (2023.02) [H10B 12/34 (2023.02)] | 19 Claims |
1. A method of manufacturing a buried word line structure, comprising:
providing a semiconductor substrate;
injecting target ions into the semiconductor substrate to form an injected region in the semiconductor substrate;
annealing the semiconductor substrate comprising the injected region to convert the injected region into an insulation region;
forming a word line trench in the insulation region by partially etching the insulation region, a width of the word line trench being less than a width of the insulation region, a height of the word line trench being less than a height of the injected region, and a residual part of the etched insulation region being used as a gate oxide layer of the buried word line structure; and
filling the word line trench with a word line metal to form the buried word line structure.
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